>g >e >@ >r module >1>.>. >?>->/>0>.>.>t >n >a >d >k >@ >1 >. >. >u >/ >0 g 2 w >8 >a >g >p >a >s >g >r + $ w >8 >q >a >f >c >k >? >r >g >a >b >g >? >e >p >? >k dimension: >y mm >[ q a >8 >k >? >v >g >k >s >k >p >? >r >g >l >e >q h at t c =25 b] unless otherwise specified h item symbol condition rated value unit igbt gagzg=gmg?g6gmgqgm6?7} collector-emitter voltage v ces g-e short h
hhh >t g@g?gvg?g6gmgqgm6?7} gate-emitter voltage v ges c-e short hh >t gagzg=gm7v collector current i c dc tc=85 b]> hhh >? i cp pulse cz 1ms hhh gagzg=gm?? collector power dissipation p c tj=175 b]> h
hhh >u tj=150 b]> h
hh
h fwd )tg3f?gbg?g=3?7} repetitive peak reverse voltage v rrm > h
hhh >t 8p7v forward current i f > hhh >? i fm pulse cz 1ms hhh >q>>k>?> > ? maximum junction temperature h0 jmax %?8h4#2,h instantaneous overload h
hh k ? ? junction temperature range h0 hf h hhhzhh
hh >? ? ? storage temperature range tstg h hhhzhh
hh >)/ )? *? } isolation voltage h2 iso terminal to base ac,1minute h>?hhh >t (rms) )~>g>>f>gv>gy>g= mounting torque module base to heatsink ftor h)h h >l>k busbar to main terminal h)h h
>g >e >@ >r module >1>.>. >?>->/>0>.>.>t >n >a >d >k >@ >1 >. >. >u >/ >0 7 ? $ "i ? >8 >c >j >c >a >r >p >g >a >? >j >a >f >? >p >? >a >r >c >p >g >q >r >g >a >q > h at t j =25 b] unless otherwise specified h characteristic symbol test condition min. typ. max. unit igbt gagzg=gm4=7v collector-emitter cut-off current i ces h2 hh! = 1200v, h2 h#h! = 0v >+ >+ >/ >. >k>? g@g?gv> ?g7v gate-emitter leakage current i ges h2 h#h! = 20v, h2 hh! = 0v >+ >+ >/ >. #>? gagzg=gmg?g6gmgqgm6?8?7} collector-emitter saturation voltage v ce(sat.) h% h = 300a,v h#h! = 15v (chip level) t j =25 b] >+ >/ >3>. >0 >.>. >t t j =125 b] >+ >/ >5>. >+ t j =150 b] >+ >/ >6>. >+ g@g?gv> f?fyf? 7 } h# ate-emitter threshold voltage v ge(th.) h2 hh! = 10v, h% h = 10ma >2 >6 >+ >5 >. >t
?5 input capacitance cies h2 hh! = 25v, h2 h#h! = 0v, hb = 1mh h6 >+ >1>. >. >+ >l>d ? 5 output capacitance coes >+ >. >6>4 >+ ?4o5 reverse transfer capacitance >?hn es >+ >. >5>. >+ g@g?gv7 , 5 gate charge qg vcc=600v, ic=300a, v ge =-15 hz +15v >+ >1>1>.>. >+ >l>a ??3?6? switching time v?6? rise time tr v cc = i c = r g = v ge = tj= 600v inductive load 300a >th >@ 15v 150 b] >+ >7>. >+ >l>q gmg?g?g8g?46? h0 urn-on delay time td(on) >+ >0>0>. >+ w7f6? h" all time tf >+ >0>7>. >+ gmg?g?g8gc46? turn-off delay time td(off) >+ >6>.>. >+ fwd 8p 7 } peak forward voltage >t >d h% f = 300a,v ge =0v (chip level) t j =25 b] >+ >0 >.>. >0 >4>. >t t j =125 b] >+ >/ >7>6 >+ t j =150 b] >+ >/ >7>3 >+ 3? g ? 6? reverse recovery time >r >p>p v cc = i h" = r g = v ge = tj= 600v inductive load 300a >th >@ 15v 150 b] >+ >0>3>. >+ >l>q !? $ "i ? >8 >r >f >c >p >k >? >j >a >f >? >p >? >a >r >c >p >g >q >r >g >a >q >a>f>_>p>_>a>r>c>p>g>q>r>g>a >q>w>k>`>m>j >r>c>q>r >a>m>l>b>g>r>g>m>l >k>g>l . >r>w>n . >k>_>v . >s>l>g>r !? ? ? thermal resistance h%h#hh0 h. th(j-c) junction to case per 1 arm (tc !lhgogqge%$wh >+ >+ >. >.>7>3 >->u h"h3h >+ >+ >. >/>3
>g >e >@ >r module >1>.>. >?>->/>0>.>.>t >n >a >d >k >@ >1 >. >. >u >/ >0 "i ? w >8 >a >f >? >p >? >a >r >c >p >g >q >r >g >a >q >a >s >p >t >c >q 0 1 2 3 4 5 0 100 200 300 400 500 600 collector to emitter voltage v ce (v) collector current i c (a) fig.1 - output characteristics (typical) tj=25c 10v v ge =20v 9v 8v 12v 15v13v 11v 0 1 2 3 4 0 150 300 450 600 collector to emitter voltage v ce (v) collector current i c (a) fig.2 - saturation voltage characteristics (typical) tj=25c tj=125c v ge =15v tj=150c 4 6 8 10 12 0 150 300 450 600 gate to emitter voltage v ge (v) collector current i c (a) fig.3 - transfer characteristics (typical) tj=25c tj=125c v ce =20v tj=150c 0 100 200 300 3 10 30 100 300 1000 3000 10000 collector current i c (a) switching time t (ns) fig.5 - collector current vs. switching time td off t f t r(ic) td on v cc =600v r g =2.4 v ge =15v tj=125c tj=150c inductive load 1 2 3 10 20 30 100 300 1000 3000 10000 series gate impedance r g ( ) switching time t (ns) fig.6 - series gate impedance vs. switching time v cc =600v i c =300a v ge =15v tj=125c tj=150c inductive load tf tr (i c ) td on td off
>g >e >@ >r module >1>.>. >?>->/>0>.>.>t >n >a >d >k >@ >1 >. >. >u >/ >0 "i ? w >8 >a >f >? >p >? >a >r >c >p >g >q >r >g >a >q >a >s >p >t >c >q 0 50 100 150 200 250 300 0 20 40 60 80 collector current i c (a) switching loss e sw (mj/pulse) fig.7 - collector current vs. switching loss e off e on v cc =600v r g =2.4 v ge =15v tj=125c tj=150c inductive load e rr 1 3 10 30 0.3 1 3 10 30 100 300 1000 series gate impedance r g ( ) switching loss e sw (mj/pulse) fig.8 - series gate impedance vs. switching loss e off e on v cc =600v i c =300a v ge =15v tj=125c tj=150c inductive load e rr 0 1 2 3 4 0 150 300 450 600 forward voltage v f (v) forward current i f (a) fig.9 - forward characteristics of fwd (typical) tj=25c tj=125c tj=150c 0 50 100 150 200 250 300 10 30 100 300 1000 forward current i f (a) peak reverse recovery current i rrm (a) reverse recovery time trr (ns) fig.10 - fwd reverse recovery characteristics (typical) i rrm trr v cc =600v, v ge =15v, r g =2.4 tj=125c tj=150c 0 200 400 600 800 1000 1200 1400 1600 0.1 0.3 1 3 10 30 100 300 1000 3000 collector to emitter voltage v ce (v) reverse voltage v r (v) collector current i c (a) reverse recovery current i rr (a) fig.11 - reverse bias safe operating area r g =2.4 , v ge =15v, tj< 150c (chip level) 10 -5 10 -4 10 -3 10 -2 10 -1 1 10 1 1x10 -3 3x10 -3 1x10 -2 3x10 -2 1x10 -1 3x10 -1 1 time t (s) transient thermal impedance rth (j-c) (c/w) fig.12 - transient thermal impedance t c =25c 1 shot pulse fwd igbt
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